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Is the watchdog timer halt when the pins, CPU and SFR are initiated?

Latest Updated:10/10/2006

Question:

The hardware manual says that if the watchdog timer underflows, the pins, CPU and SFR are initiated. Does the watchdog timer halt at this time?

Answer:

Registers related to the watchdog timer are initiated and the watchdog timer counting operation stops. However, the watchdog timer of the parts other than R8C/10 and R8C/11 Groups automatically operates, if the bit 0 of address FFFFh of the Flash memory is set to "0". In this case, the watchdog timer does not halt.
R8C/18
R8C/19
R8C/1A
R8C/1B
R8C/20
R8C/21
R8C/22
R8C/23
R8C/24
R8C/25
R8C/26
R8C/27
R8C/28
R8C/29
R8C/2A
R8C/2B
R8C/2C
R8C/2D
R8C/2E
R8C/2F
R8C/2G
R8C/2H
R8C/2J
R8C/2K
R8C/2L
R8C/32C
R8C/33C
R8C/34C
R8C/35C
R8C/36C
R8C/38C
R8C/3GC
R8C/3JC
R8C/32D
R8C/33D
R8C/35D
R8C/3GD
R8C/33T
R8C/38A
R8C/34E, R8C/34F, R8C/34G, R8C/34H
R8C/36E, R8C/36F, R8C/36G, R8C/36H
R8C/38E, R8C/38F, R8C/38G, R8C/38H
R8C/L35C
R8C/L36C
R8C/L38C
R8C/L3AC