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What are the frequency settings of PLL clock after reset?

Latest Updated:06/26/2013

Question:

What are the frequency multiplication settings of the PLL clock after reset?

Answer:

After reset, the system clock control register (SCKCR) is initialized to 02020200h. Therefore, the system clock (ICLK) and peripheral module clock (PCLK), are set to the oscillation frequency × 2 (times two).

For the initial value of SCKCR, please refer to the Register Descriptions in the Clock Generation Circuit chapter of the hardware manual.

Suitable Products
RX62T