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Cortex-R4 RZ/T1 Fixed Vector (0x18) Setting of IRQ interrupt

Last Updated:09/27/2017

Question:

Is it possible to set the fixed vector (0x18) setting of the IRQ interrupt by setting the VE bit to "0" of the System Control Register (SCTLR)?

Answer:

According to the specifications of RZ/T1, setting "SCTLR.VE bit = 0" as a fixed vector is prohibited.
You can set "SCTLR.VE bit = 1" to provide an offset address from the Vector Interrupt Controller (VIC) only.
An offset address can be assigned by the VADn register, with "n" being between 1 - 300 inclusive.
Suitable Products
RZ/T1