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How data bus operate when access in 16/32 bits to external memory space where 8 bit bus width is set,?

Latest Updated:03/26/2009

Question:

When accessing in the word size(16 bits) or longword size(32 bits) to the external memory space where 8 bit bus width is set, how will the data bus operate?

Answer:

If 8 bit bus width is set, the effective data bus will be D7~D0 pins regardless of the access size of longword/word/byte.
The data is output to D7~D0 pins as follows, when accessing in the word size(16 bits) or longword size(32 bits) to the external memory space where 8 bit bus width is set.

When accessing to Address n in the longword size, 4 consecutive memory accesses are generated.

  • 1st access Address n
  • 2nd access Address n+1
  • 3rd access Address n+2
  • 4th access Address n+3

When accessing to Address n in the word size, 2 consecutive memory accesses are generated.

  • 1st access  Address n
  • 2nd access Address n+1
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