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Why the set transfer rate may not be obtain in the I2C bus interface?

Latest Updated:03/25/2009

Question:

In the I2C bus interface of SH7144/SH7145, the set transfer rate might not be obtained. Is there any possible reason?

Answer:

 (1) Check whether the SCL rise time is within the tolerance or not. (Refer to Table 14.9 on the hardware manual)

  The values of table 14.9 indicate the timing that this product monitors the SCL level.
  When the rising time is slower than the values on the table, the high level period of SCL is extended and the transfer rate is reduced.
  The time SCL takes to rise is determined by the pull-up resistance and the load capacitance of SCL signal line.
   To operate at the specified transfer rate, set the pull-up resistance and load capacitance so that each time is within the corresponding value given in table 14.9.

 (2) Please refer to the technical update for the notes on transfer rate in I2C bus interface of the SH7144/SH7145 group.

http://documentation.renesas.com/eng/products/mpumcu/tu/tnsh7a545ae.pdf

Suitable Products
SH7144, SH7145